Processing In Memory: Chips to Petaflops
نویسندگان
چکیده
This paper discusses the potential use of Processing-InMemory (PIM) Technology in petaflops level computing. It starts with a quick review of a proposed PIM architecture called Shamrock, and follows that up with a discussion of several execution models that the architecture supports. Sizings for a petaflops-level machine constructed solely from PIM devices at several points in time are given. This is then projected to how PIM architectures will play a pivotal role in the recently initiated HTMT (Hybrid Technology MultiThreaded) petaflops system architecture project.
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